Jul 14 2015

MIPS: jz4740: Consolidate chained IRQ handler install/remove 

Author: Thomas Gleixner <tglx@linutronix.de>

Chained irq handlers usually set up handler data as well. We now have
a function to set both under irq_desc->lock. Replace the two calls
with one.

Search and conversion was done with coccinelle.

Reported-by: Russell King 
Signed-off-by: Thomas Gleixner 
Cc: Julia Lawall 
Cc: linux-mips@linux-mips.org
Cc: LKML 
Cc: Jiang Liu 
Patchwork: https://patchwork.linux-mips.org/patch/10695/
Signed-off-by: Ralf Baechle 

---
 arch/mips/jz4740/gpio.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
 
diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c
index 54c80d4..77df160 100644
--- a/arch/mips/jz4740/gpio.c
+++ b/arch/mips/jz4740/gpio.c
@@ -423,8 +423,8 @@ static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id)
 	chip->base = ioremap(JZ4740_GPIO_BASE_ADDR + (id * 0x100), 0x100);
 
 	chip->irq = JZ4740_IRQ_INTC_GPIO(id);
-	irq_set_handler_data(chip->irq, chip);
-	irq_set_chained_handler(chip->irq, jz_gpio_irq_demux_handler);
+	irq_set_chained_handler_and_data(chip->irq,
+					 jz_gpio_irq_demux_handler, chip);
 
 	gc = irq_alloc_generic_chip(chip->gpio_chip.label, 1, chip->irq_base,
 		chip->base, handle_level_irq);

qlambert